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| LEADER |
01205nom a2200337 u 4500 |
| 001 |
10072994 |
| 003 |
upatras |
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20210117201740.0 |
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090513s2006 eng |
| 020 |
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|a 9780387312750
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| 040 |
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|a GR-PaULI
|c GR-PaULI
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| 041 |
0 |
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|a eng
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| 100 |
1 |
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|a Bergeron, Janick
|9 71613
|
| 245 |
1 |
0 |
|a Writing Testbenches using System Verilog
|h [electronic resource]
|c by Janick Bergeron
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| 260 |
|
|
|a Boston, MA
|b Springer Science+Business Media, Inc.
|c 2006
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| 300 |
|
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|b v.: digital
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| 650 |
|
4 |
|a Engineering
|9 17712
|
| 650 |
|
4 |
|a Computer engineering
|9 24296
|
| 650 |
|
4 |
|a System safety
|9 64896
|
| 650 |
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4 |
|a Computer aided design
|9 24299
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| 650 |
|
4 |
|a Systems engineering
|9 64844
|
| 650 |
|
4 |
|a Engineering
|9 17712
|
| 650 |
|
4 |
|a Electronic and Computer Engineering
|9 64855
|
| 650 |
|
4 |
|a Quality Control, Reliability, Safety and Risk
|9 64898
|
| 650 |
|
4 |
|a Computer-Aided Engineering (CAD, CAE) and Design
|9 64865
|
| 650 |
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4 |
|a Circuits and Systems
|9 24301
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| 852 |
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|a GR-PaULI
|b ΠΑΤΡΑ
|b ΒΚΠ
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|u http://dx.doi.org/10.1007/0-387-31275-7
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|w 2016-04-24
|y ERS
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| 999 |
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|c 49239
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