|
|
|
|
| LEADER |
01069cam a2200241 a 4500 |
| 001 |
00291063 |
| 003 |
GR-PaULI |
| 008 |
040714s2000 xxu b 001 0 eng d |
| 020 |
|
|
|a 0201360632
|
| 040 |
|
|
|a GrPaTEI
|b gre
|c GR-PaULI
|
| 082 |
|
0 |
|a 621.381
|2 22
|
| 100 |
1 |
|
|a Zwolinski, M.
|
| 245 |
1 |
0 |
|a Digital system design with VHDL /
|c Mark Zwolinski.
|
| 260 |
|
|
|a Harlow, England
|a New York :
|b Prentice Hall,
|c 2000.
|
| 300 |
|
|
|a xii, 323 σ. :
|b εικ. ;
|c 24 εκ.
|
| 504 |
|
|
|a Περιλαμβάνει βιβλιογραφικές αναφορές και ευρετήριο
|
| 650 |
|
0 |
|a Digital electronics
|x Data processing
|
| 650 |
|
0 |
|a VHDL (Computer hardware description language)
|
| 650 |
|
7 |
|a Ψηφιακά ηλεκτρονικά
|x Επεξεργασία δεδομένων
|2 lcsh/gre
|
| 942 |
|
|
|2 ddc
|
| 952 |
|
|
|0 0
|1 0
|2 ddc
|4 0
|6 621_381000000000000_ZWO
|7 0
|9 250535
|a LISK-2
|b LISK-2
|c BSC
|d 2021-01-17
|e 24
|f 0
|g 0.00
|l 0
|o 621.381 ZWO
|p 99243000007410
|r 2021-01-17 00:00:00
|t 1
|w 2021-01-17
|y BK15
|x GrPaTEI - Antirrio
|
| 971 |
|
|
|a .b11844346
|b 19-10-20
|c 27-08-15
|
| 999 |
|
|
|c 148715
|d 148715
|